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  fn6433 rev 3.00 page 1 of 12 december 10, 2015 fn6433 rev 3.00 december 10, 2015 isl9001a ldo with low isupply, high psrr datasheet isl9001a is a high performance low dropout linear regulator capable of sourci ng 300ma current. it has a low standby current and high-psrr and is stable with output capacitance of 1f to 10f with esr of up to 200m ? . the isl9001a has a very hig h psrr of 90db and output noise less than 30v rms . a reference bypass pin allows connection of a noise -filtering capacitor for low-noise and high-psrr applications. w hen coupled wit h a no load quiescent current of 25a (ty pical), and 0.1a shutdown current, the isl9001a is an ideal choice for portable wireless equipment. the isl9001a provides a p good signal with delay time programmable through an external capacitor. several different fixed voltage outputs are standard. output voltage options for each ldo range from 1.5v to 3.3v. other output voltage options may be available upon request. pinout isl9001a (8 ld dfn) top view features ? 300ma high performance ldo ? excellent transient respons e to large current steps ? excellent load regulation: <0.1% voltage change across full range of load current ? high psrr: 90db @ 1khz ? wide input voltage capability: 2.3v to 6.5v ? extremely low quiescent current: 25a ? low dropout voltage: typically 200mv @ 300ma ? low output noise: typically 30v rms @ 100a (1.5v) ? stable with 1f to 10f ceramic capacitors ? soft-start to limit input current surge during enable ? current limit and overheat protection ? delayed por, programmable with external capacitor ? 1.8% accuracy over all operating conditions ? tiny 2mmx3mm 8 ld dfn package ? -40c to +85c operatin g temperature range ? pb-free (rohs compliant) applications ? pdas, cell phones and smart phones ? portable instruments, mp3 players ? handheld devices, including medical handhelds vin en cbyp cpor vo por nc gnd 2 3 4 1 7 6 5 8
isl9001a fn6433 rev 3.00 page 2 of 12 december 10, 2015 ordering information part number (notes 1, 2) part marking vo voltage (v) (note 3) temp range (c) package tape and reel (pb-free) pkg. dwg. # isl9001airbz-t ebb 1.5 -40 to +85 8 ld 2x3 dfn l8.2x3 isl9001aircz-t ebc 1.8 -40 to +85 8 ld 2x3 dfn l8.2x3 ISL9001AIRFZ-T ebd 2.5 -40 to +85 8 ld 2x3 dfn l8.2x3 isl9001airjz-t ebe 2.8 -40 to +85 8 ld 2x3 dfn l8.2x3 isl9001airkz-t ebf 2.85 -40 to +85 8 ld 2x3 dfn l8.2x3 isl9001airlz-t ( no longer available or supported, recommended part: isl9005airkz-t) ebg 2.9 -40 to +85 8 ld 2x3 dfn l8.2x3 isl9001airnz-t ebj 3.3 -40 to +85 8 ld 2x3 dfn l8.2x3 notes: 1. these intersil pb-free plastic packaged products employ speci al pb-free material sets; molding compounds/die attach material s and 100% matte tin plate plus anneal - e3 termi nation finish, which is rohs co mpliant and compatible with both snpb and pb-free soldering ope rations. intersil pb-free products are msl classified at pb-free peak re flow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. 2. please refer to tb347 for de tails on reel specifications 3. for other output voltages, contact intersil marketing.
isl9001a fn6433 rev 3.00 page 3 of 12 december 10, 2015 absolute maximum ratings thermal information supply voltage (vin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.1v vo pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.6v all other pins . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (vin + 0.3)v recommended operating conditions ambient temperature range (t a ) . . . . . . . . . . . . . . .-40c to +85c supply voltage (vin) . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3v to 6.5v thermal resistance (notes 4, 5) ? ja (c/w) ? jc (c/w) 8 ld 2x3 dfn package . . . . . . . . . . . . 69 10 junction temperature range . . . . . . . . . . . . . . . . .-4 0c to +125c operating temperature range . . . . . . . . . . . . . . . . .-4 0c to +85c storage temperature range . . . . . . . . . . . . . . . . . .-6 5c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 4. ? ja is measured in free air with the component mounted on a high e ffective thermal conductivity t est board with direct attach f eatures. see tech brief tb379. 5. for ? jc , the case temp location is the center of the exposed metal p ad on the package underside. electrical specifications unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature range of the device as follows: t a = -40c to +85c; v in = (v o + 0.5v) to 5.5v with a minimum v in of 2.3v; c in = 1f; c o = 1f. parameter symbol test conditions min (note 7) typ max (note 7) units dc characteristics supply voltage v in 2.3 6.5 v ground current quiescent condition: i o = 0a i dd ldo active 25 32 a shutdown current i dds ldo disabled @ +25c 0.1 1.0 a uvlo threshold v uv+ 1.9 2.1 2.3 v v uv- 1.6 1.8 2.0 v regulation voltage accuracy initial accuracy at v in = v o + 0.5v, i o = 10ma, t j = +25c -0.7 +0.7 % v in = v o + 0.5v to 5.5v, i o = 10a to 300ma, t j = +25c -0.8 +0.8 % v in = v o + 0.5v to 5.5v, i o = 10a to 300ma, t j = -40c to +125c -1.8 +1.8 % maximum output current i max continuous 300 ma internal current limit i lim 350 475 600 ma dropout voltage (note 6) v do1 i o = 300ma; v o ? 2.5v 300 500 mv v do2 i o = 300ma; 2.5v ? v o ? 2.8v 250 400 mv v do3 i o = 300ma; v o > 2.8v 200 325 mv thermal shutdown temperature t sd+ 145 c t sd- 110 c ac characteristics ripple rejection i o = 10ma, v in = 2.8v (min), v o = 1.8v, c byp = 0.1f @ 1khz 90 db @ 10khz 70 db @ 100khz 50 db output noise voltage i o = 100a, v o = 1.5v, t a = +25c, c byp = 0.1f bw = 10hz to 100khz 30 v rms
isl9001a fn6433 rev 3.00 page 4 of 12 december 10, 2015 device start-up characteristics device enable time t en time from assertion of the enx pin to when the output voltage reaches 95% of the vo (nom) 250 500 s ldo soft-start ramp rate t ssr slope of linear portion of ldo output voltage ramp during start-up 30 60 s/v en pin characteristics input low voltage v il -0.3 0.5 v input high voltage v ih 1.4 v in + 0.3 v input leakage current i il , i ih 0.1 a pin capacitance c pin informative 5 pf por pin characteristics por thresholds v por+ as a percentage of nominal output voltage 91 94 97 % v por- 87 90 93 % por delay t plh c por = 0.01f 100 200 300 ms t phl 25 s por pin output low voltage v ol @ i ol = 1.0ma 0.2 v por pin internal pull-up resistance r por 78 100 180 k ? notes: 6. vox = 0.98*vox(nom); valid for vox greater than 1.85v. 7. parts are 100% tested at +25c. temperature limits establishe d by characterization and are not production tested. electrical specifications unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature range of the device as follows: t a = -40c to +85c; v in = (v o + 0.5v) to 5.5v with a minimum v in of 2.3v; c in = 1f; c o = 1f. (continued) parameter symbol test conditions min (note 7) typ max (note 7) units v por+ v por+ v por- isl9001a fn6433 rev 3.00 page 5 of 12 december 10, 2015 typical performance curves figure 2. output voltage vs input voltage (3.3v output) figure 3. output voltage change vs load current figure 4. output voltage change vs temperature figure 5. output vo ltage vs input voltage (3.3v output) figure 6. output voltage vs input voltage (2.8v output) figure 7. dropout voltage vs load current output voltage, vo (%) input voltage (v) -0.6 -0.2 0.2 0.6 -0.8 3.8 4.2 6.2 5.8 6.6 3.4 4.6 5.0 5.4 -0.4 0.0 0.4 0.8 v o = 3.3v +85c -40c +25c i load = 0ma 0.04 0.06 -0.06 -0.10 100 200 300 400 0 load current - i o (ma) output voltage change (%) -0.02 0.00 0.02 0.08 0.10 -0.04 -0.08 50 150 250 350 v in = 3.8v v o = 3.3v +85c -40c +25c 0.04 0.06 -0.06 -0.10 -10 20 50 110 -40 temperature (c) output voltage change (%) -0.02 0.00 0.02 0.08 0.10 -0.04 -0.08 -25 5 35 80 65 95 125 v in = 3.8v v o = 3.3v i load = 0ma output voltage, vo (v) input voltage (v) 3.0 3.1 3.2 3.3 3.4 2.9 2.8 3.1 3.6 4.1 4.6 5.1 6.1 5.6 i o = 300ma i o = 150ma i o = 0ma v o = 3.3v 6.5 2.5 2.6 2.7 2.8 2.9 2.4 2.3 2.6 3.1 3.6 4.1 4.6 5.1 6.1 input voltage (v) output voltage, vo (v) 5.6 i o = 0ma i o = 300ma v o = 2.8v i o = 150ma 6.5 200 250 300 350 150 100 50 0 50 100 150 200 250 300 350 400 0 output load (ma) dropout voltage, v do (mv) v o = 2.8v v o = 3.3v
isl9001a fn6433 rev 3.00 page 6 of 12 december 10, 2015 figure 8. dropout voltage vs lo ad current figure 9. ground current vs input voltage figure 10. ground current vs load figure 11. ground current vs tem perature figure 12. power-up/power-down f igure 13. turn-on/turn-off respons e typical performance curves (continued) 200 250 300 350 150 100 50 0 50 100 150 200 250 300 350 400 0 output load (ma) dropout voltage, v do (mv) v o = 3.3v +85c +25c -40c 15 20 25 30 40 4.0 5.0 6.5 input voltage (v) ground current (a) 35 3.0 3.5 4.58 5.5 6.0 -40c +25c +125c v o = 3.3v 10 200 160 100 20 0 50 100 150 200 250 400 0 load current (ma) ground current (a) 350 300 v o = 3.3v v in = 3.8v 40 60 80 120 140 180 +85c -40c +25c 20 10 -10 20 50 110 -40 temperature (c) ground current (a) 30 35 40 25 15 -25 5 35 80 65 95 125 v in = 3.8v v o = 3.3v i load = 0a 2 3 4 5 1 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 5.0 time (s) voltage (v) 4.0 4.5 por 0 v o = 2.85v i l = 150ma v o v in 1 3 0 2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 time (ms) vo (v) ven (v) 5 v o = 2.85v v in = 5.0v i l = 150ma c l = 1f c byp = 0.01f 1.8 2.0
isl9001a fn6433 rev 3.00 page 7 of 12 december 10, 2015 figure 14. line transient respon se, 3.3v output figure 15. line tr ansient response, 2.8v output figure 16. load transient response f igure 17. spectral noise densi ty vs frequency figure 18. psrr vs frequency typical performance curves (continued) 400s/div v o = 3.3v i load = 300ma 3.6v 4.3v 10mv/div c load = 1f c byp = 0.01f 400s/div 10mv/div v o = 2.8v i load = 300ma 3.5v 4.2v c load = 1f c byp = 0.01f 100s/div v o (25mv/div) i load 300ma 100a v in = 2.8v v o = 1.8v spectral noise density (nv/ ? hz ) frequency (hz) 1000 100 10 1 0.1 10 100 1k 10k 100k 1m v in = 3.6v v o = 1.8v i load = 10ma c byp = 0.1f c in = 1f c load = 1f 100 1k 10k 100k 1m frequency (hz) 0 10 20 30 40 50 60 70 80 90 100 psrr (db) v in = 3.6v v o = 1.8v i o = 10ma c byp = 0.1f c load = 1f
isl9001a fn6433 rev 3.00 page 8 of 12 december 10, 2015 pin description typical application pin number pin name description 1 vin supply voltage/ldo input: connect a 1f capacitor to gnd. 2 en ldo enable. 3 cbyp reference bypass capacitor pin: optionally connect capacitor of v alue 0.01f to 0.1f between t his pin and gnd to achieve lowest noise and highest psrr. 4 cpor por delay setting capacitor pin: connect a capacitor between this pin and gnd to delay the por output release after the output reaches 94% of its specified voltage level. (200ms delay per 0.01f). 5 gnd gnd is the connection to system ground. connect to pcb gro und plane. 6 nc do not connect. 7por open-drain por output (active-low): internally connected to vo through 100k ? resistor. 8 vo ldo output: connect capacitor of value 1f to 10f to gnd (1f recommended) . c1, c3: 1f x5r c eramic capacitor isl9001a vin en cbyp vo gnd 8 5 1 2 3 v in (2.3v to 5v) enable v out c1 c2 c3 off on cpor c4 (200ms delay, c4 = 0.01f) v out too low v out ok c4: 0.01f x7r ceramic capacitor c2: 0.1f x7r ceramic capacitor por 7 4
isl9001a fn6433 rev 3.00 page 9 of 12 december 10, 2015 block diagram functional description the isl9001a contains all circui try required to implement a high performance ldo. high performance is achieved through a circuit that deliver s fast transient response to varying load conditions. in a quiescent condition, the isl9001a adjusts its biasing to achieve the lowest standby current consumption. the device also integr ates current limit protection, smart thermal shutdown protection, and soft-start. smart thermal shutdown protects the devic e against overheating. power control the isl9001a has an enable pin (en) to control power to the ldo output. when en is lo w, the device is in shutdown mode. during this condition, all on-chip circuits are off, and the device draws minimum current, typically less than 0.1a. when the enable pin is assert ed, the device first polls the output of the uvlo det ector to ensure that vin voltage is at least about 2.1v. once verified, the device initiates a start-u p sequence. during the start-up s equence, trim settings are first read and latched. then, s equentially, the bandgap, reference voltage and current generation circuitry power up. once the references are stable, a fast-start circuit quickly charges the external reference bypass capacitor (connected to the cbyp pin) to the proper operating volt age. once the bypass capacitor has been charged, the ldo powers up. during operation, whenever the vin voltage drops below about 1.84v, the isl9001a immediately disables the ldo output. when vin rises ba ck above 2.1v, the device re-initiates its start-up se quence and ldo operation will resume automatically. reference generation the reference gener ation circuitry includes a trimmed bandgap, a trimmed voltage ref erence divider, a trimmed current reference generator, and an rc noise filter. the filter includes the external capacit or connected to the cbyp pin. a 0.01f capacitor connecte d cbyp implements a 100hz lowpass filter, and is recommended for most high performance applications. for th e lowest noise application, a 0.1f cbyp capacitor should be used. this filters the reference noise to below the 10hz to 1khz frequency band, which is crucial in many noi se-sensitive applications. the bandgap generates a zero temperature coefficient (tc) voltage for the reference di vider. the reference divider provides the regulation refere nce, por detection thresholds, and other voltage references r equired for current generation and over-temperature detection. the current generator output s references required for adaptive biasing as well as references fo r ldo output current limit and thermal shutdown determination. vo gnd bandgap and temperature sensor uvlo vin short circuit, thermal protection, soft-start en control logic cbyp 1.0v 0.94v 0.9v por gnd por delay 1.0v vo 100k cpor voltage and reference generator + - + -
isl9001a fn6433 rev 3.00 page 10 of 12 december 10, 2015 ldo regulation and programmable output divider the ldo regulator is impl emented with a high-gain operational amplifier driving a pmos pass transistor. the design of the isl9001a provide s a regulator that has low quiescent current, fast transient response, and overall stabili ty across all operating and load cur rent conditions. ldo stability is guaranteed for a 1f to 10f output capacitor that has a tolerance better than 20% and esr less than 200m ? . the design is performance- optimized for a 1f capacitor. unless limited by the applicat ion, use of an outp ut capacitor value above 4.7f is not recomm ended as ldo performance improvement is minimal. soft-start circuitry integrated i nto each ldo limits the initia l ramp-up rate to about 30s/v to minimize current surge. the isl9001a provides short-circui t protection by limiting the output current to about 425ma. the ldo uses an independently trimmed 1v reference as its input. an internal resistor divider drops the ldo output voltag e down to 1v. this is compare d to the 1v ref erence for regulation. the resistor divis ion ratio is programmed in the factory. power-on reset generation the isl9001a has a power-on reset signal generation circuit, which indicates that output power is good. the por signal is generated as follows. a por comparator continuously monitors the output of the ldo. the ldo enters a powe r-good state when the output voltage is above 94% of the ex pected output voltage for a period exceeding the ldo pgood entry delay time (see the following). in the power-good state, the open-drain por output is in a high-impedance state. an internal 100k ? pull-up resistor pulls the pin up to the ldo output voltage. an external resisto r can be added between the por output and the ldo output for a faster rise time, however, the por output should not connect through an external r esistor to a supply greater than the ldo voltage. the power-good state is exited when the ldo output falls below 90% of the expected outp ut voltage for a period longer than the pgood exit de lay time. while pow er-good is false, the isl9001a pulls the por pin low. the pgood entry and exit delays are determined by the value of an external capacitor conne cted to the cpor pin. for a 0.01f capacitor, the entry a nd exit delays are 200ms and 25s respectively. larger or sma ller capacitor values will yiel d proportionately longer or short er delay times. the por exit delay should never be allowed to be less than 10s to ensure sufficient immunity against t ransient induced false por triggering. overheat detection the bandgap outputs a proportion al-to-temperature current that is indicative of the temper ature of the sil icon. this curr ent is compared with references to determine if the device is in danger of damage due to overheating. when the die temperature reaches about +140 c, if the ldo is sourcing more than 50ma, it shuts down unt il the die cools sufficiently. once the die temperature fall s back below about +110c, the disabled ldo is re-enabled and so ft-start automatically takes place.
fn6433 rev 3.00 page 11 of 12 december 10, 2015 isl9001a intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2007-2015. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. about intersil intersil corporation is a leading provider of innovative power management and precision analog solutions. the company's produc ts address some of the largest marke ts within the industrial and i nfrastructure, mobile computing and high-end consumer markets. for the most updated datasheet, application no tes, related documentation and related parts, please see the respective product information page found at www.intersil.com . you may report errors or suggesti ons for improving this datashe et by visiting www.intersil.com/ask . reliability reports are also a vailable from our website at www.intersil.com/support revision history the revision history provided is for informational purposes onl y and is believed to be accurate, but not warranted. please go to the web to make sure that you have the latest revision. date revision change december 10, 2015 fn6433.3 added rev history and about intersil v erbiage. updated ordering information on page 2 updated pod l8.2x3 to most curr ent version. rev changes are as follows: tiebar note 5 updated from: tiebar shown (if present ) is a non-functional feature. to: tiebar shown (if present) is a non-functional feature and m ay be located on any of the 4 sides (or ends). bottom view: changed exposed pad height from 1.80 +/-0.10 to 1.80 +0.10/-0.1 5 changed exposed pad width from 1.65 +/-0.10 to 1.65 +0.10/-0.15 side view: changed 0.05 to 0.05 max converted to new pod standards by adding land pattern and movin g dimensions from table onto drawing.
isl9001a fn6433 rev 3.00 page 12 of 12 december 10, 2015 package outline drawing l8.2x3 8 lead dual flat no-lead plastic package rev 2, 3/15 located within the zone indicated. the pin #1 identifier may be unless otherwise specified, tolerance : decimal 0.05 the configuration of the pin #1 identifier is optional, but mus t be between 0.25mm and 0.30mm from the terminal tip. dimension applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing conform to asme y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" side view typical recommended land pattern top view compies to jedec mo-229 vced-2. 7. (4x) 0.15 index area pin 1 pin #1 c seating plane base plane 0.08 see detail "x" c c 4 6 a b 0.90 0.10 0.05 max 0.05 max 0.20 ref 2.00 3.00 2x 1.50 8x 0.40 0.10 8x 0.25 +0.07/-0.05 index area 6x 0.50 (1.65) (1.50) (8x 0.60) (8x 0.25) (1.80) (2.80) (6x 0.50) 1 8 0.10 a mc b 0.10 c 1.80 +0.10/-0.15 1.65 +0.10/-0.15 either a mold or mark feature. tiebar shown (if present) is a non-functional feature and may b e located on any of the 4 sides (or ends).


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